Lecture 1: Getting Started

• Course Introduction
• Course Schedule
• Course Grading
• Intro to Kiel University of Applied Sciences
• Image Film Kiel University of Applied Sciences
• Content Digital Design

Lecture 2: Introduction to Digital Design

• History of Digital Design
• Hierarchy of Computation
• System Components
• Development of Transistors and Integrated Circuits
• Robert Noyce, Jack Kilby, Gordon Moore
• Fairchild, Intel
• Moore*s Law
• Trends in Computing
• Integrated Circuit Complexity
• Analog versus Digital Signal, Why Digital?
• Binary Signals, Voltage Range of Binary Signals
• Introduction to Number Systems

Lecture 3: Introduction to Digital Design

• Understanding Number Systems
• Information Units
• Decimal, Octal, Binary Numbers
• Conversion between Number Bases
• The Growth of Binary Numbers
• Binary Addition, Subtraction, Multiplication

Lecture 4: Introduction to Digital Design

• Understanding Hexadecimal Numbers
• Conversion between Hexadecimal and Binary Numbers
• Converting between Base 16 and Base 8
• Signed Numbers
• Signed magnitude, One's Complement, Two's Complement
  
• Finite Number Representation
• One's Complement Addition and Subtraction
• Two's Complement Addition and Subtraction
• Polyadic and B-adic Number Systems
• Boolean Algebra
• Areas of Boolean Algebra
• Set Theory, Propositional Logic, Circuit Algebra
• Basics of Boolean Algebra
• Boolean Functions and Binary Functions

Lecture 5: Introduction to Digital Design

• Using Sets to describe Boolean Functions
• Truth Tables to describe Boolean Function
• Describing Boolean Functions using Mathematical Symbols
• Using switches to describe Boolean Functions
• Describing Boolean Functions using Venn-Diagrams
• Describing Boolean Functions using Circuit Symbols
• Combining Sets
• Classification of Boolean Functions
• Unary Boolean Function
• Binary Boolean Functions
• Ternary Boolean Functions
• The Basic Functions of Digital Design: OR, AND, NOT
• Fundamentals of Boolean Algebra
• Boolean Postulates and Theorems
• Laws of Boolean Algebra
• Commutative, Associative, Distributive, Identity, Absorption, Zero-One, Complement
• The De Morgan Theorem

Lecture 6: Introduction to Digital Design

• Exercises: Number Systems and Boolean Algebra

Lecture 7: Introduction to Digital Design

• Duality Principle and Boolean Lattices
• The Duality Principle
• Complete Logical Systems
• Universal Logical Blocks
• NAND - Sheffer Function
• NOR - Peirce Function
• NAND Realization of NOT, AND, OR
• Strongly Complete Systems
• Circuit Symbols (IEC/ANSI/IEEE Standards)
• Combinational Circuit Design
• Combinational, Combinatorial
• The Karnaugh-Veitch Diagram/Map (K-Maps)
• Design Principle for larger Karnaugh Diagrams
• K-Maps for up to six variables
• Two- and Three-dimensional K-Maps

Lecture 8: Introduction to Digital Design

• Duality Principle and Boolean Lattices
• The Duality Principle
• Design Examples, Double Rail System
• Example for Circuit Simplification
• Minterms, Maxterms
• Canonical and Standard Forms
• Canonical Disjunctive Normal Form (cDNF)
• Canonical Conjunctive Normal Form (cCNF)
• Disjunctive Normal Form (DNF)
• Conjunctive Normal Form (CNF)
• Examples cDNF, cCNF, DNF, CNF
• Building Groups in K-Maps
• Circuit Simplification and Minimization

Lecture 9: Prime Implicants

• Implicants
• Prime Implicant (PI)
• Core (Essential) Prime Implicant
• Absolutely Eliminable Prime Implicant
• Relatively Eliminable Prime Implicant
• Classification of Implicants
• Quine Method
• Minterm Table, Grouping Table
• McCluskey Method
• Selection Table, Reduced Selection Table
• Quine-McCluskey Method
• Pro/Con Quine-McCluskey Method

Lecture 10: Function Bundles, Subfunctions

• Summary: Fundamental Description of Boolean Algebra
• Sum-of-Products Form, Product-of-Sums Form
• AND/OR-Networks
• Special Simplification Cases: NAND "Nibbling Tool"
• Pin Count
• Function Bundles
• Reduction of Complexity
• Shared Subfunctions
• Designing Selected Combinational Circuits
• Code Converter: BCD to Gray Code
• Decimal 7-Segment Display

Lecture 11: Decomposition of Functions

• Subfunctions
• Disjunctive Decomposition of Functions
• Iterative Decomposition of Functions
• Example: Parity Checker
• Example: Adder Circuits
• Half Adder, Full Adder
• Shannon Decomposition
• Function Decomposition using Switches

Lecture 12: Introduction to Digital Design

• Exercises: Boolean Functions and K-Map

Lecture 13: Multiplexers, Demultiplexers

• Multiplexers
• Shannon decomposition using multiplexer realization
• Multiplexers as Universal Building Blocks
• Data Selectors
• Multiplexer-Demultiplexer Application
• Multiplexers: TTL Circuits (Transistor-Transistor-Logic)
• TTL circuit 74x153
• Multiplexer circuit symbol
• LSI Technology (Large-Scale Integration)
• Tristate Output, Open-Collector Output
• Bus Systems
• Multiplexed Latches
• Decoder/Demultiplexer
• Binary to "1-of-n" Code

Lecture 14: Multiplexers, Decoder, Demultiplexers

• Demultiplexer
• Decoder/Demultiplexer Applications
• Decoder in Microprocessor Applications
• Decoder as Universal Logic Block
• Memory-based Implementation of Digital Circuits
• ROMs, RAMs
• Memory Presentation of a Truth Table
• Programmable Logical Devices (PLDs)
• Programmable Logic Array
• AND Array, OR Array, Fusible Links
• PAL, PROM
• Application Examples: PLA versus PROM

Lecture 15: Sequential Circuits

• PLA and Implicants
• PROM/PAL Comparison
• Sequential Circuits
• Circuits with Feedback
• State Definition
• State Diagram, State Transition Diagram
• The basic Flip-Flop
• Set, Reset, Store Function
• Flip-Flop Applications
• Glitches
• Timing and Logic Behaviour
• Dual-Edge Control

Lecture 16: Sequential Circuits

• Design of a Latch / Flip-Flop
• Bistable Flip-Flop
  
• The RS-Flip-Flop, NOR and NAND Realization
  
• Level-sensitive
  
• The gated Flip-flop
  
• The gated RS-Flip-flop (gated latch)
  
• The D-Flip-Flop (data latch)
  
• The JK-Flip-Flop
  
• Race-around problem
  
• Edge Triggering
  
• leading-edge, trailing-edge
  
• Master-Slave Configuration
  
• Structure of Master-Slave Flip-flops

Lecture 17: Sequential Circuits

• Clock Skew
• Dual-edge triggered Flipflops
  
• D Flip-Flop, T Flip-Flop
  
• The D Flip-Flop SN7474
  
• Distinction Latch/Flip-Flop
  
• Pulse Characterization
  
• Summary: Flip-Flop Classification
  
• Flip-Flop Transformation
  
• Register, Shift Register (SRG)
  
• Classification of Shift Registers

Lecture 18: Sequential Circuits

• Implementation of Shift Registers
  
• Shift Register Devices (ICs)
  
• SRG Device 74LS194
  
• Propagation Delay Effects
  
• Hazards
  
• Glitch, Spike
  
• Classification of Hazards
  
• Logic Hazards
  
• Functional Hazards
  
• Single/Multi-Component Transitions
  
• Static Hazards
  
• Dynamic Hazards

Lecture 19: Sequential Circuits

• How to avoid Hazards
  
• Examples: circuits with hazards
  
• Finite State Machines (FSMs) and Automata
  
• Feedback
  
• Synchronous FSMs
  
• Asynchronous FSMs

Lecture 20: Sequential Circuits

• Finite State Machine (FSM) Terminology
  
• FSM Stability
  
• Definition of State
  
• Definition of Output
  
• Mealy and Moore Machines
  
• Mealy and Moore Machines: Design Principles
  
• Storage Realization of Automata
  
• Applications of Micro programmed FSMs
  
• Quiz: Digital Design

Lecture 21: Sequential Circuits: Counter

• Counter and Divider
  
• Counter Specifications
  
• Synchronous and asynchronous Counter
• Ripple changing
  
• Design of synchronous Counters
• Modulo-6 Counter
  
• Development Phases
• Transition Map, Transition Table
• Application Diagram
  
• Solution with D Flip-Flops
  
• Solution with JK Flip-Flops

Lecture 22: Sequential Circuits: Counter

• Design of asynchronous Counters
• Required number of Flip-Flops and State Coding
  
• Design of an asynchronous BCD Counter
  
• BCD Counter as modified Mod-16 Counter
  
• Systematic design as an asynchronous counter
  
• Systematic design phases of asynchronous counters
  
• Multi-stage Counters
• Exam Preparation